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Basically electrocardiography is a commonly used, non-invasive procedure for recording electrical changes in the heart. The record, which is called an electrocardiogram (ECG or EKG), shows the series of waves that relate to the electrical impulses which occur during each beat of the heart. The results are printed on paper or displayed on a monitor. The waves in a normal record are named P, Q, R, S, T, U and follow in alphabetical order. This research exploits the technology of parallel processing to process the electrocardiography computational kernels in parallel. The idea we are presenting is to implement the traditional multi lead bulky electrocardiogram on a programmable chip which is small and more efficient.

The technology is implemented on an FPGA (Target device is Altera Stratix III EP3SL50F484C2) based on Multicore System on Chip. The Logic Utilization for one-lead system which is scalable to multi lead after compilation was 43%, combinational ALUTs 9669/38000 (25%), Memory ALUTs 16/19000 (<1 .="" 11583="" 463.86mw="" and="" dissipation="" of="" power="" registers="" span="" thermal="" total="">


Title Page
Table of Contents
List of Figures
List of Tables

Chapter One: Introduction
1.0       Introduction
1.1       Purpose of the research work
1.2       Background
1.3       Scope of work

Chapter Two: Literature review
2.0 Electrocardiography and heart disease
2.1 Digital signal processing
2.1.1 Analog and digital signals
2.1.2    Signal processing
2.1.3 Analog to digital conversion
2.1.4    Sampling
2.1.5    Quantization error
2.1.6    Sampling rate
2.1.7    Oversampling
2.1.8 Aliasing
2.1.9 ADC structures
2.1.10 Autocorrelation function
2.2 Digital filters
2.2.1 Analysis techniques
2.2.2 Impulse response
2.2.3    Difference equation
2.2.4    Filter design
2.2.5    Filter realization
   Direct form I
   Direct form II
2.3       Programmable Logic Devices
            2.3.1    Programmable Array Logic (PAL)
            2.3.2    Programmable Logic Array (PLA)
            2.3.3    Generic Array Logic (GAL)
            2.3.4    Complex Programmable Logic devices (CPLD)
2.4       Field Programmable Gate Array (FPGA)
            2.4.1    History of FPGA
            2.4.2    Modern development
            2.4.3 Architecture
            2.4.4    FPGA design and programming
2.5       Multicore system on chip
            2.5.1    Structure
            2.5.2    Design flow
2.6       Electronic design automation (EDA) tools
            2.6.1    System on programmable chip (SOPC) builder
            2.6.2    Nios II processor
            2.6.3    Hardware description Language (HDL)

Chapter three: Analysis and Design
3.0       Peak period detection algorithm
3.1       Period detection
            3.1.1    Reading data
            3.1.2    Derivation
            3.1.3 Autocorrelation
            3.1.4    Finding intervals
3.2       Digital finite impulse response filter design FIR
3.3       System architecture
            3.3.1    Reading data section
            3.3.2    Filtering and data analysis section
            3.3.3    Display section

Chapter four : Implementation and results
4.0       SOPC builder system generation and quartus II compilation
4.1       Quartus II compilation of the entire design
4.2       Nios II IDE implementation of ppd algorithm
4.3       Results
            4.3.1    Flow Summary
            4.3.2 Analysis and synthesis resources usage summary
            4.3.3    Power analysis summary
            4.3.4    Register transfer logic RTL of design

Chapter five: Conclusion and Future work
5.0       Conclusion
5.1       Future work




Technology over the years has been a tool that man has employed to make life a better place for habitation. The importance of health to life cannot be over emphasised as it is a common saying that health is wealth. In general our state of health is reflected in our heart beats, blood pressure, body temperature and a whole lot of other parameters. The state of the heart is obviously the most important since it is the power house of a man's life. This research intend to develop a system that will monitor the state of health of a person by analysing input signals from the body system of a person and sending the result to a doctor in a remote location who will examine the analysed body signals and know the state of health of the person in real time. It is a very interesting novelty. You don't have to move here and there to be examined by your doctor. It is a just in time and on the fly medical examination. In Africa and other parts of the world there are some sick or elderly people who have mobility impedance. Such a class of people need not border about mobility as the technology is all about best comfort. Again apart from sick and elderly people every living soul needs this technology. The state of our heart is very important and a lot of people just don't care about the state of their hearts. Its not that they don't want to but considering the stress of going to the hospital, waiting for a doctor and paying for medical examination people are not motivated to go for heart check up. With the technology being proposed heart medicine will experience a great revolution as the boundaries of engineering are pushed beyond the limit. The technology will be implemented on an FPGA. At a very high level of abstraction the system will accept input signals from the user (like the probes of an ECG) but in this case in-body and then pass the signal through an analog to digital converter (ADC). The result from the ADC is then filtered by passing it through a filter. Then to memory. The resulting output is fed to EGC analyser for analysis of the filtered signal to generate

appropriate waveforms that reflect the state of health of the heart of the patient. The ECG analyses is...

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